Product catalog — two lines, one architecture

Everything between the model and the consequence.

The EthicVault platform governs AI in software for the enterprise, and the EthicVault silicon line enforces the same verdicts in hardware at the edge. Both run the identical deterministic core — patent-pending, proof-bound, fail-closed.

AThe Platform — Software

Four modules, one chain of custody.

01Measurement layer

Resonance Engine

A thirteen-module pipeline that measures every AI output — in a single decision — against both an approved reference and a prohibited one, with the anisotropy of embedding space corrected before anything is scored.

Dual-reference measurementEvery output is scored against an approved reference and a prohibited reference together, in one decision; a violating look-alike cannot pass on topical proximity alone.
Reference constructionBuild both references from Delphi-validated Golden Datasets, from your own governing policy clauses, or a hybrid of the two — an alternative per deployment, not a stack.
Discrimination marginThe verdict follows the gap between approved and prohibited coherence, not proximity to either one alone.
Contrastive calibrationScored between a prohibited-exemplar floor and an approved-exemplar ceiling, with a dynamic-range guard — no silent collapse.
02Enforcement layer

Friction Gate

A three-tier deterministic classifier standing between every AI output and the systems it touches. Fixed-point arithmetic, frozen thresholds, hard-veto priority — the same input always produces the same verdict.

APPROVEDAll dimensions clear their frozen thresholds; the action dispatches with zero added latency.
SOFT_FRICTIONGuard-band, out-of-distribution, and low-confidence outputs route to audit — never default to pass.
HARD_VETOA normative floor violation forces BLOCK regardless of every other score. Non-negotiable by design.
Execution frictionDeterministic delays, evidence requirements, and approval steps that scale with proximity to a boundary.
03Authority layer

Policy Engine

The only component with authority to decide — and it operates exclusively on proof-bound, fixed-point state. Ordered validation is architectural: no code path reaches threshold evaluation without it.

Ordered validationSchema → proof-anchor → replay, in strict sequence. Failure at any stage short-circuits to BLOCK.
Fixed-point stateBasis points over 0–10,000. Bit-identical across CPU, GPU, and JIT backends.
Replay defensePayload digests are single-use; timestamps and nonces are enforced. Old approvals cannot be reused.
Sector policiesThresholds tuned per policy, jurisdiction, and sector — healthcare, legal, financial, public.
04Evidence layer

WORM Audit Chain

Every disposition is serialized into a canonical decision record, hashed, and anchored in a write-once-read-many ledger. Years later, an examiner can replay any verdict byte-for-byte.

Immutable anchoringAppend-only substrate — ledger, chain, or WORM store. No update path exists.
Merkle batchingHigh-throughput group commits under a single root; each record keeps its own inclusion proof.
Byte-for-byte replayRecompute the digest from preserved inputs and match the stored root — or detect tampering instantly.
Regulator-readyDecision records map to SOX, DORA, and MiFID II evidentiary expectations out of the box.
BThe Silicon — Hardware

Governance you can hold in tweezers.

First disclosed in our hardware continuation-in-part filing: the governance architecture as an integrated circuit, where permission to actuate is a physical interlock rather than a mutable instruction.

Single-die governance

Governance SoC

A system-on-chip that fabricates the entire governance stack — fixed-point gate, proof-binding engine, policy state machine, WORM controller — beside the AI inference core, with a hardware execution restrictor in series on the actuation path.

  • 01Fail-closed restrictor: non-conducting on power-up, reset, and every fault state
  • 02No floating-point unit — verdicts are bit-identical across vendors and process nodes
  • 03No radio, no network interface operative at decision time
  • 04Average power < 1 mW over the operating window

For third-party silicon

Hardened IP Macro

The governance gate, proof engine, and policy machine delivered as a hardened macro (GDSII), placed in mandatory series in a host SoC's dispatch path — the host's output physically cannot reach a terminal without traversing it.

  • 01Mandatory in-path placement via on-die interconnect or NoC tap
  • 02Tamper and authenticity check of the macro itself
  • 03Redundant policy logic with voter; dual-rail dispositions defeat single-event faults
  • 04Verified bit-exact across Xilinx and Intel FPGA fabrics at 100 MHz timing closure

Where failure is irreversible

Edge Embodiments

Reference designs for the three environments where AI actuation is most consequential — built on the same deterministic core, each with the fail-safety profile its domain demands.

  • 01Implantable medical — reversible fail-closed latch with audited re-arm; a false alarm never bricks a life-critical path
  • 02Automotive ECU — blocked commands drop the vehicle to a fail-operational safe state, every disposition recorded
  • 03Secure payment — powered from the reader field, authorization withheld without an approve disposition
  • 04Oracle resistance — monotonic attempt counters and probe detection resist boundary reverse-engineering
CFits Your Estate

Model-agnostic. Boundary-strict.

EthicVault governs the output, not the model — any system that proposes an action can be placed behind the gate.

OpenAI GPTFoundation model
Anthropic ClaudeFoundation model
Google GeminiFoundation model
Meta LlamaOpen source
Azure OpenAICloud hosted
Custom fine-tunesInternal models

Supported model estates

On-premises

Deploy entirely within your data center. Zero egress; air-gapped options for classified or restricted environments.

Air-gapped · Zero egress · FIPS 140-2

Private VPC

Single-tenant deployment in your AWS, Azure, or GCP environment. Your keys, your VPC, your compliance boundary.

Single-tenant · BYO cloud · PrivateLink

Embedded silicon

The governance core as an SoC or hardened IP macro inside your device — governance that ships in the product itself.

SoC · GDSII macro · Sub-1 mW

See the gate refuse something live.

A private technical briefing walks your risk and engineering teams through the full architecture — software and silicon — against your own scenarios.

Request enterprise accessRead the security brief